Noise and Interference in Instrumentation — Part 6: Best Practices for PCB Design

Interference theory is only useful if it survives contact with a real board. This lecture collects the PCB layout practices that keep sensitive analog nodes quiet, explains the physics behind each one, and finishes with a group assignment — laying out a battery-powered wearable ECG acquisition device — along with the reasoning behind its power-supply architecture.

1. Layout principles and process

The lecture summarises PCB considerations for instrumentation in four groups:

• Analog paths and sensitive nodes: keep analog signal paths short; separate analog and digital signals and portions of the board; keep inputs and outputs separate (and shield sensitive parts if needed) to prevent feedback and oscillation; remember that parallel components can couple electromagnetically (crosstalk); do not route sensitive nodes under or between other components.
• Grounding: provide good ground return paths and high-frequency bypassing; minimise inductance (vital for high-speed circuits); maintain an effective ground plane and fill void areas on signal layers with ground fill.
• Power: bring power in near the outputs, so supply currents do not flow near the inputs of amplifying stages; pay close attention to how AGND and DGND connect.
• General: through-hole parts interact with every layer in a multi-layer design. Surface-mount parts have less inductance, but the via placement still sets the loop.

The suggested layout process: review the schematic and mark sensitive areas, sensitive analog paths, EMI and interference sources and heat sources; fix connector positions and plan part placement before routing; and spend considerable effort planning — prioritising the analog portion, then power routing and planes, then bypass capacitors and other critical components. Choose packages that make layout easier (e.g. SMD for short connections).

2. Crosstalk and traces

Crosstalk is the unwanted transfer of signals between adjacent conductors, through capacitive or inductive coupling (the mechanisms of Part 5). It is most visible on parallel signal paths and high-speed data lines, and is mitigated by increasing the spacing between conductors, using twisted-pair cables, and differential signalling.

Traces themselves behave like more than wires: they can act as antennas and have transmission-line properties — inductance and resistance. Power traces should therefore be wide, and connections and terminations (vias) should be made effectively.

3. Shared ground impedance

Shared ground connections create conductive coupling between sub-circuits: the return currents of both flow through the same impedance, making the ground reference of the sensitive circuit fluctuate. The lecture contrasts two PCB implementations of the same schematic:

• Avoid: a long shared return — larger ground loop, shared impedance.
• Preferred: a direct via to the ground plane for each part — the shortest return and a minimal loop, with no shared impedance return path.

4. Guard rings

Contaminants, moisture or high-voltage traces on a PCB cause stray nanoampere currents to leak across the board surface. If that leakage reaches a highly sensitive, high-impedance input node, it corrupts the signal. The remedy is a dedicated copper trace — a guard ring — around the sensitive node:

• Passive guard rings are simply grounded, acting as a shield against capacitive coupling.
• Active guard rings are driven by an op-amp buffer to exactly the same voltage as the sensitive input trace. Because the potential between ring and input node is identical, the voltage difference is zero — so by Ohm’s law zero leakage current can cross the gap. Stray current leaking from external noise sources hits the guard ring first and is shunted away through the buffer’s low-impedance output before it can reach the critical signal.

5. Decoupling (bypass) capacitors

ICs draw current in short, sharp pulses whenever they switch (logic, MCUs, ADCs, even op-amps), but the supply reaches the IC through traces that have inductance. Because v = L di/dt, a pulse that is fast enough makes the supply collapse at the IC pin:

A decoupling capacitor from the supply pin to ground, right next to the IC, is a local charge reservoir: fast current pulses come from the capacitor through a tiny loop, and the regulator only has to top it up slowly. It decouples in both directions — it keeps the IC’s switching noise off the shared supply rail, and it shunts rail noise to ground before it reaches the IC (adding to the IC’s PSRR) — thanks to its low impedance at high frequency.

Choosing and placing capacitors

• Add a 100 nF ceramic capacitor at every supply pin, plus a 1–10 µF bulk capacitor per rail or IC group for slower, larger current demands.
• For the assignment: 100 nF at every IC supply pin — INA, ADC, MCU and LDO outputs (plus any datasheet-specified values). The ADC reference pin needs its own decoupling (datasheet value) because reference noise goes straight into every sample. AVDD capacitors return to AGND, DVDD capacitors to DGND.
• Placement matters more than value: do not put vias between the bypass capacitor and the active device — a via adds inductance and defeats the whole point of the capacitor, which is a low-inductance path for fast current. Route vias into the bypass capacitor and then into the active component; use wide traces; keep them as close as possible; and put the bypass capacitor on the same layer as the active component.

6. Splitting the PCB: analog and digital

Partition the board into distinct analog and digital regions whenever the layout allows, placing analog and digital parts in separate regions. Split the ground plane only if necessary — a continuous ground is often the better choice, since splitting it can force long return-current detours. If it must be split, join the grounds at one point, typically under the ADC.

7. Assignment: wearable ECG board

The group assignment (two students per group) evaluates how well you can select and place components and lay out a PCB to minimise noise and obtain clean ECG signals from a battery-powered wearable ECG acquisition device. Additional components (e.g. filters) may be added, but the blocks shown are mandatory: instrumentation amplifier (INA), ADC, microprocessor with BLE, reference voltage, driven-right-leg (DRL) circuit, and the power chain of Li-ion battery, buck-boost converter, and LDOs for analog and digital rails.

8. Design rationale: power tree, ADC and reference

The assignment slides pose a series of “why?” questions. The answers describe a power-supply and conversion architecture designed around noise.

Why a buck-boost converter?

A Li-ion cell ranges from 4.2 V fully charged to about 3 V fully discharged. To hold 3.3 V we must step down while the battery is full and step up when it is nearly flat — a buck-boost does both.

Why a separate ADC rather than the MCU’s?

• The MCU’s ADC is fine, but the MCU has a clock, BLE RF and so on, which can couple into the ADC measurements; a separate ADC sits in the quiet analog area.
• Resolution versus DC offset: each electrode–skin interface has a half-cell potential and the difference between two electrodes can be ≈ 300 mV DC — 300 times the 1 mV ECG riding on top. A 12-bit MCU ADC with a 3.3 V range has a step of q = 3.3/2¹² ≈ 0.8 mV, about the whole ECG (1 LSB). Getting 1 µV resolution at the input needs a front-end gain of ≈ 800, at which point the DC offset saturates the amplifier. (You would need AC coupling, high-pass filters and several gain stages, each adding noise, parts and slow recovery after motion.) A 24-bit ADC has a far smaller step, so a front-end gain of about 6 is sufficient.
• The MCU’s ADC would be good enough only if you need the heart rate alone, with an analog front end that already provides gain and high-pass filtering.

Why emphasise the reference voltage?

If the reference fluctuates, all digitised samples fluctuate with it (see Part 5).

Why another (linear) regulator after the switching regulator?

The buck-boost leaves tens of mV of switching ripple at 1–2 MHz, while an ECG signal may be only 1 mV. A linear regulator (LDO) cleans up the ripple by attenuating it by its power-supply rejection ratio:

PSRR is frequency-dependent (check the regulator datasheet; it is usually high at low frequencies and drops at MHz), so choose an LDO that has high PSRR at the switching frequency of the chosen buck-boost. Because the device is battery powered, keep the LDO drop-out voltage as low as possible.

Why two LDOs?

• The MCU and BLE radio draw current in pulses (ΔI). Through a shared impedance Z (a single LDO serving both analog and digital sides) this gives ΔV = ΔI · Z on that rail: a 10 mA burst through 0.1 Ω puts 1 mV straight onto the analog supply.
• With a separate analog LDO, whose PSRR is about 60 dB at low frequency, that falls to about 1 µV. This keeps digital return currents and supply noise out of the analog front end.
• BLE bursts repeat every 7.5–100 ms (about 10–133 Hz), which is inside the ECG band — so filtering cannot remove them afterwards. They have to be prevented from entering the analog section in the first place.